In data processing systems, such as in computer microprocessor systems, control units, peripheral units, as well as in other information processing systems, so-called CPU's (central processing unit) are often used as central processing units of a computer for the purpose of calculation, but simple arithmetic logic units (ALU) may also just be used. In addition, corresponding memories, such as RAM, ROM, EPROM, EEPROM, etc., are used for storing programs and data. The processor or the CPU executes a program or runs a program. In this context, the program is made up, as a rule, of different partial programs, which, in turn, may be dedicated to different tasks. This is referred to as multitasking.
Depending on a current scenario, that is, which tasks require processing at this moment, it is thereby decided which task should be executed by the CPU. In this context, it is conceivable for different tasks to be assigned different priorities, so that during the execution of the tasks, the priority assigned to the specific tasks is taken into account and, accordingly, the task of highest priority is processed first. This is achieved, for example, using so-called interrupts. An interrupt is a short-term interruption of a program, in order to carry out other higher-priority or time-critical processing of another task. In this context, an interruption request is initially made, whereupon an interruption routine is executed and the task executed up to that point is interrupted; and after the interrupt is terminated, this task is resumed at the point of interruption. This means that as a rule, a current request of a task, which has a higher priority than the task in process at the moment, is thereby processed first, and that the task already in process is interrupted instead. In the process, the interrupt in question causes the CPU to jump into a corresponding program section.
The previously mentioned multitasking may also bring about so-called time sharing, which a plurality of users apparently make use of simultaneously. In general, multitasking refers to the ability of a CPU to execute several tasks concurrently. In so doing, the different processes are always activated in alternating fashion in such short intervals, that an impression of simultaneity is formed.
However, the selection of the priorities to be assigned to individual tasks and the execution time of high-priority tasks may result in the tasks having low priority rarely being executed and, in the extreme case, not at all. This may then be the case, when above-mentioned interrupt requests come virtually continuously, and consequently, in this case, the dependence of a task prioritized low in relation to other tasks cannot be completed in its entirety. In this case, it is necessary to take measures to ensure a so-called worst-case execution time (WCET) and, therefore, a minimum degree of operating capacity of the CPU for each task to be processed.
However, in the past, such guarantees have turned out to be potentially very expensive and, in addition, to be able to limit the performance of the underlying system. Furthermore, an interrupt controller, which additionally must be equipped with a priority control system, is necessary in this case.
It has already been described how, using a cyclical interrogation of all tasks, even those not having requests, it can be decided which task shall be processed. To that end, a circuit arrangement was put forward, which is implemented in a data processing architecture and is configured to suitably assign the tasks to be processed to the processing unit available to the system. In this context, the circuit arrangement ensures that the processing capacity of the processing unit is distributed uniformly to the specific tasks and independently of a requirement of the specific tasks, up to their respective execution, and that the processing unit is allocated to the specific tasks in a time-staggered manner for processing. In this manner, each task is automatically processed within a certain time, in particular, within the above-mentioned worst-case execution time (WCET), irrespective of a previously undertaken prioritization. In this context, the time span between two planning times affected during the execution planning always corresponds to the number of tasks N multiplied by a clock pulse duration TCLK, during which each task is processed.
Hereinafter, this variable is also referred to as execution time of a task T.
In addition, a circuit arrangement that implements a modified algorithm for execution planning has already been put forward, where prioritization of so-called active tasks is undertaken. In this context, inactive tasks, which already have no use for the computing capacity of an ALU or a CPU, are not included in the operation planning, which means that on average, the processing is sped up.
However, the cyclical prioritization change thereby taking place during the processing of tasks/data has the disadvantage that the underlying algorithm for operation planning in the processing system, which has several so-called pipeline stages, may result in the execution time T being greater than the above-mentioned product of the number of tasks N and the clock pulse duration TCLK.
Therefore, it would be desirable to provide an option of utilizing the available operating capacity of a central processing unit or CPU, such that it is ensured in a simple manner that each task to be processed, which currently requires processing, is processed within a certain time; it further being ensured that a maximum execution time is not exceeded.